Warsaw University of Technology / Research / Catalogue of Research Projects of Warsaw University Of Technology / Development of science and knowledge / Faculty of Electronics and Information Technology

Electrical characterization of dielectric-semiconductor interface in advanced MOS structures

Supervisor: Lidia Łukasiak Professor PhD, DSc
e-mail: lukasiak@imio.pw.edu.pl
tel.: +48 22 234 71 47, +48 22 825 30 55
beginning: 2008-10-29
end: 2010-04-30
Project coordinator:
Partners:

Aim of Project:
Adaptation of the charge pumping current to characterization of advanced MOS structures in the presence of strong coupling between top and bottom interfaces and considerable gate leakage current.

Expected results:
Development of a methodology to determine the energy distribution of interface traps in SOI structures using 3-level charge pumping and methodology of the characterization of MIS structures in the presence of gate leakage current. Moreover, a model of charge-pumping current in SOI structures taking into account the coupling between top and bottom interfaces will be presented.