Synthesis of reversible logic circuits - new approaches and algorithms
Supervisor: Paweł Kerntopf, Professor PhD, DSc
e-mail: P.Kerntopf@ii.pw.edu.pl
tel. +48 22 234 77 11
fax. +48 22 234 60 91
Beginning: 2010-05-17
End: 2012-11-16
Aim of project
Development of algorithms for designing reversible digital circuits based on new concepts and determination of efficiency of these algorithms. It will be a continuation of previous theoretical research as well as construction of new design algorithms. Computer programs implementing developed algorithms will be written and then evaluated using benchmarks described in the literature.
Expected results
The results will include publications, two PhD theses and design tools for generating optimal circuits (for small number of variables) and quasi-optimal circuits (for large number of variables). Current results will be presented at international conferences and published in journals. A book describing state-of-the-art of designing reversible digital circuits, the first in Poland and one of a few in the world will be prepared.
Polish version